Verilog Implementation of D-Flip Flop

Introduction:-

Verilog Implementation of D-Flip Flop

           In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are fundamental building blocks of digital electronics systems used in computers, communications, and many other types of systems.

Verilog Code For D-Flip Flop:-

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: VHDL Language
// Engineer: Manohar Mohanta
// 
// Create Date:    19:47:54 11/16/2017 
// Design Name: D-Flip Flop
// Module Name:    d_ff 
// Project Name: Verilog Implementation of Delay Flip Flop
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module d_ff(
    input d,
    input clk,
    input rst,
    output q
    );
  reg q;
always @ (posedge clk)
begin
 if(rst==1'b1)
 begin
  q=1'b0;
 end
 else
 begin
  q=d;
 end
end
endmodule

Simulation Result For D-Flip Flop:-