Verilog Implementation of 4:9 XOR Network

Verilog Implementation of 4:9 XOR Network

This Code is used in one of the Project presents on the website so we are posting this code here. The title of the project is DESIGN AND ANALYSIS OF SCAN POWER REDUCTION BASED ON LINEAR FEEDBACK SHIFT REGISTER RESEEDING.

Proposed XOR network is given as,Let X0, X1, X2, X3 be the inputs Let O0, O1, O2, O3, O4, O5 O6, O7 and O8 are the outputs
O0 can be obtained by X0 xor X1 xor X2
O1 can be obtained by X1 xor X2;
O2 can be obtained by X0 xor X2;
O3 can be obtained by X0 xor X1 xor X3;
O4 can be obtained by X1 xor X3;
O5 can be obtained by X1 xor X2 xor X3;
O6 can be obtained by X2 xor X3
O7 can be obtained by X0 xor X2 xor X3;
O8 can be obtained X0 xor X3.
This proposed XOR network has 4 inputs and 9 outputs. Some of the inputs are dependent with outputs.

Code for 4:9 XOR Network:-

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: VHDL Language
// Engineer: Manohar Mohanta
// 
// Create Date:    19:09:04 11/16/2017 
// Design Name:  Low Power LFSR
// Module Name:    xor_network 
// Project Name:  LFSR
// Target Devices: Spartan 6
// Tool versions: 14.5
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module xor_network(
    input [3:0] x,
    output [8:0] o
    );
wire [3:0]w;
xor_gate xor1 (x[0],x[1],w[0]);
xor_gate xor2 (w[0],x[2],o[0]); /// First Out Put

xor_gate xor3 (x[1],x[2],o[1]);

xor_gate xor4 (x[0],x[2],o[2]);

xor_gate xor5 (x[0],x[1],w[1]);
xor_gate xor6 (w[1],x[3],o[3]);///Four Output

xor_gate xor7 (x[1],x[3],o[4]);

xor_gate xor8 (x[1],x[2],w[2]);
xor_gate xor9 (w[2],x[3],o[5]);/// Six Output

xor_gate xor10 (x[2],x[3],o[6]);

xor_gate xor11 (x[0],x[2],w[3]);
xor_gate xor12 (w[3],x[3],o[7]);/// Eight Ouptput

xor_gate xor13 (x[0],x[3],o[8]);
endmodule

Simulation Result for 4:9 XOR Network:-
Verilog Implementation of Xor Network