Verilog Implementation of Mod 3 Counter

Introduction

Modulus counters, or simply MOD counters, are defined based on the number of states that the counter will sequence through before returning back to its original value. For example, a 2-bit counter that counts from 002 to 112 in binary, that is 0 to 3 in decimal, has a modulus value of 4 ( 00 → 01 → 10 → 11 , return back to 00 ) so would therefore be called a modulo-4, or mod-4, counter. Note also that it has taken 4 clock pulses to get from 00 to 11.

Verilog code of Mod 3 Counter:-

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: VHDL Language
// Engineer: Manohar Mohanta
// 
// Create Date:    13:17:22 01/23/2018 
// Design Name: Mod 3 Counter
// Module Name:    mod3_counter 
// Project Name: Verilog Implementation of Mod 3 Counter
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module mod3_counter(
    input clk,
  input rst,
    output [1:0] mod
    );
 reg [1:0]mod;
always @ (posedge(clk))
begin
 if(rst == 1'b1)
 begin
  mod = 2'b11;
 end
 else
 begin
  if(mod== 2'b10)
  begin
   mod = 2'b00;
  end
  else
  begin
   mod = mod+1'b1;
  end
 end
end
endmodule

Simulation Result of Mod3:-

 Mod 3 Counter