Basic Logical XNOR Gate Program In VHDL Language

XNOR Gate Gatelevel Program in VHDL
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-- Company: VHDLtutorials.blogspot.in
-- Engineer: G.Anitha
--
-- Create Date:    13:16:39 06/18/2014
-- Design Name:     G.Anitha
-- Module Name:    xnorgate - gate level
-- Project Name:    Basic Logical xnor gate
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;


entity xnorgate is
    Port ( a : in  STD_LOGIC;
           b : in  STD_LOGIC;
           c : out  STD_LOGIC);
end xnorgate;

architecture Behavioral of xnorgate is

begin
c <= a xnor b;

end Behavioral;

The Output For the Above program is shown below

Simulated Result:-