Verilog Implementation of a power b / a^b in Decimal Values

a power b

In this project, we are implementing a small mathematical function called a power b or a^b. A and B values are taken in decimal format and result will be in decimal format.

Note:- The symbol here used ^ is not XOR function.

Code For a^b:-

//----------------------------------------------------------------------------------
//-- Company: VHDL Language
//-- Engineer: Manohar Mohanta
//-- 
//-- Create Date:    14:33:07 11/17/2017 
//-- Design Name: 		Exponential
//-- Module Name:    Exponential-2bits - Behavioral 
//-- Project Name: 	exp
//-- Target Devices: 
//-- Tool versions: 
//-- Description: 
//--
//-- Dependencies: 
//--
//-- Revision: 
//-- Revision 0.01 - File Created
//-- Additional Comments: 
//--
//----------------------------------------------------------------------------------
module exp(
			input [1:0]a,
			input [1:0]b,
			output [6:0]c);
		assign c = a**b;
endmodule

Stimulated Results for a power b:-

Simulated Results for a^b