2:4/3:8/4:16 Digital Decoder With Truth Table

In this eletronic's world digital decoder plays a very important role for bilding a digital circut in electronics.So let us talk some theory about the Decoders.
Here in 2 to 4 decoder we have 2 inputs and 4 outputs all depends on the formula as

N:2^N

where N=no of inputs

Its is for all reset of the decoders like 3 to 8 / 4 to 16.


Now let us see the VHDL code for 2:4 Decoder in Behavioral Modeling style/technique

----------------------------------------------------------------------------------
-- Company: vhdltutorials.blogspot.com
-- Engineer: Manohar Mohanta
--
-- Create Date:    03/20/2015
-- Design Name:  2:4 Decoder
-- Module Name:    2:4Decoder - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description: It is 2:4 decoder where we give two inputs according to it the output line is selected.
-- Dependencies:
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity logicgate is
    Port ( a : in  STD_LOGIC_VECTOR(1 downto 0);
              m : out STD_LOGIC_VECTOR(3 downto 0));
end logicgate;

architecture Behavioral of logicgate is
begin
process(a)
begin
if(a="00")then
 m <= "0001";
elsif(a="01")then
 m <= "0010";
elsif(a="10")then
 m <= "0100";
elsif(a="11")then
 m <= "1000";
else
 m<="0000";
end if;
end process;

end Behavioral;

Simulated Result

Gate Level Diagram